A Self-Test Methodology for IP Cores in Bus-Based Programmable SoCs
نویسندگان
چکیده
We present a novel test methodology for testing IP cores in SoCs with embedded processor cores. The methodology uses the processor core to run a test program to deliver test patterns to the target IP cores in the SoC and analyze the test responses. The test program can also use the processor core to generate test patterns. This provides tremendous flexibility in the type of patterns that can be applied to the IP cores without incurring significant hardware overhead. We use a bus based SoC simulation model to validate our test methodology. The test methodology involves addition of a test wrapper that can be configured for specific test needs. The methodology supports at-speed testing for delay faults and stuck-at testing of IP cores implementing full-scan.
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